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framework-internalsdevelopment

fpga

FPGA development guidelines covering Vivado, SystemVerilog, timing closure, AXI interfaces, and hardware optimization.

Mindrally
maintainer
Mindrally
업데이트됨 1/23/2026
스타
59
포크
5
quick start

Installation and usage

FPGA development guidelines covering Vivado, SystemVerilog, timing closure, AXI interfaces, and hardware optimization.

설치
$ install --globalskills.sh
사용법

설치 후 터미널에서 다음 명령을 실행하여 이 스킬을 사용할 수 있습니다:

skills use fpga