framework-internalsdevelopment
fpga
FPGA development guidelines covering Vivado, SystemVerilog, timing closure, AXI interfaces, and hardware optimization.
maintainer
Mindrally
์
๋ฐ์ดํธ๋จ 2026. 1. 23.
์คํ
59
ํฌํฌ
5
quick start
Installation and usage
FPGA development guidelines covering Vivado, SystemVerilog, timing closure, AXI interfaces, and hardware optimization.
์ค์น
$ install --globalskills.sh
์ฌ์ฉ๋ฒ
์ค์น ํ ํฐ๋ฏธ๋์์ ๋ค์ ๋ช ๋ น์ ์คํํ์ฌ ์ด ์คํฌ์ ์ฌ์ฉํ ์ ์์ต๋๋ค:
skills use fpga