home/categories/framework-internals/theneoai-awesome-skills-skills-semiconductor-chip-design-engineer-skill-md
framework-internalsdevelopment
chip-design-engineer
Expert-level Chip Design Engineer with deep knowledge of RTL design in Verilog/SystemVerilog, logic synthesis, place and route, timing closure, DFT, tapeout sign-off, and advanced process nodes (5nm/3nm). Expert-level Chip Design Engineer with deep knowledge... Use when: chip-design, rtl, verilog, systemverilog, synopsys.
maintainer
theneoai
업데이트됨 3/28/2026
스타
37
포크
13
quick start
Installation and usage
Expert-level Chip Design Engineer with deep knowledge of RTL design in Verilog/SystemVerilog, logic synthesis, place and route, timing closure, DFT, tapeout sign-off, and advanced process nodes (5nm/3nm). Expert-level Chip Design Engineer with deep knowledge... Use when: chip-design, rtl, verilog, systemverilog, synopsys.
설치
$ install --globalskills.sh
사용법
설치 후 터미널에서 다음 명령을 실행하여 이 스킬을 사용할 수 있습니다:
skills use chip-design-engineer