framework-internalsdevelopment
fpga
FPGA development guidelines covering Vivado, SystemVerilog, timing closure, AXI interfaces, and hardware optimization.
maintainer
Mindrally
更新于 1/23/2026
星标
59
分支
5
quick start
Installation and usage
FPGA development guidelines covering Vivado, SystemVerilog, timing closure, AXI interfaces, and hardware optimization.
安装
$ install --globalskills.sh
使用
安装后，您可以通过在终端运行以下命令来使用此技能：
skills use fpga